Features

■ 32-bit RXv3 CPU core

 Maximum operating frequency: 120 MHz

Capable of 709 CoreMark in operation at 120 MHz

 A collective register bank save function is available.

 Supports the memory protection unit (MPU)

 JTAG and FINE (one-line) debugging interfaces

■ Low-power design and architecture

 Operation from a single 2.7- to 5.5-V supply

 Three low-power modes

■ On-chip code flash memory

 Supports versions with up to 512 Kbytes of ROM

 Operation at 120 MHz (with no waiting)

 User code is programmable by on-board or off-board programming.

 Programming/erasing as background operations (BGOs)

 A dual-bank structure allows exchanging the start-up bank.

■ On-chip data flash memory

 16 Kbytes, reprogrammable up to 100,000 times

 Programming/erasing as background operations (BGOs)

■ On-chip SRAM

 64 K/48Kbytes of SRAM (with no waiting)

■ Data transfer

 DMACAa: 8 channels

 DTCb: 1 channel

■ ELC

 Module operation can be initiated by event signals without using

interrupts

 Linked operation between modules is possible when the CPU is in

sleep mode

■ Reset and supply management

 Power-on reset (POR)

 Low voltage detection (LVD) with voltage settings

■ Clock functions

 The main clock oscillator is connectable to an 8- to 24-MHz external

crystal resonator and usable as the PLL reference clock.

 Internal 240-kHz LOCO and HOCO selectable from 16, 18, and 20

MHz

 120-kHz clock for the IWDTa

■ Independent watchdog timer

 120-kHz IWDT-dedicated on-chip oscillator clock operation

■ Useful functions for IEC60730 compliance

 Oscillation-stoppage detection, functions for self-diagnosis and

detection of disconnection for the A/D converter, clock frequency

accuracy measurement circuit, independent watchdog timer, RAM

test-assisting function by DOC, and CRCA, etc.

 Register write protection function can protect values in important

registers against overwriting.

■ Encryption functions (Trusted Secure IP Lite)

 128- or 256-bit key length of AES for ECB, CBC, GCM, others

 True random number generator

 Unauthorized access to the encryption engine is disabled and

imposture and falsification of information are prevented

 Safe management of keys