This counter contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and divideby-eight counter. This counter has a gated zero reset. To use the maximum count length of this counter, the B input is connected to the QA output. The input count pulses are applied to input A and the outputs are as described in the appropriate function table.
Ordering Information
|
Part Name |
Package Type |
Package Code (Previous Code) |
Package Abbreviation |
Taping Abbreviation (Quantity) |
|
HD74LS293P |
DILP-14 pin |
PRDP0014AB-B (DP-14AV) |
P |
— |
Pin Arrangement

Absolute Maximum Ratings
|
Item |
Symbol |
Ratings |
Unit | |
|
Supply voltage |
VCC |
7 |
V | |
|
Input voltage |
RO Inputs |
VIN |
7 |
V |
|
A, B Inputs |
5.5 |
V | ||
|
Power dissipation |
PT |
400 |
mW | |
|
Operating temperature |
Topr |
–20 to +75 |
°C | |
|
Storage temperature |
Tstg |
–65 to +150 |
°C | |